Please use this identifier to cite or link to this item:
|Title:||THE ARCHITECTURE OF HENDERSON'S SECD MACHINE|
|Abstract:||We explain and document the architecture of an eager SECD machine devised by Henderson. A software interpreter for this architecture has been in use for two years and has been well tested. Expansion of the interpreter leads to the detailed specifications of an architecture in VLSI. Such an SECD chip has been layed out and fabricated.|
|Appears in Collections:||Birtwistle, Graham |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.