Noise-Immune Digital Circuit Design Based on Probabilistic Models
Date
2012-12-17
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Abstract
This thesis focuses on the logic design architectures that are inherently tolerant to noise. It aims at achieving noise-tolerance using Markov Random Field (MRF). This model considers inputs and outputs of a circuit as random variables and the function is evaluated via correct network states, which maximize the joint probability distribution of those variables. In implementation, this translates in creating a feedback that reinforces the correct states. Such circuits are simulated using the 16nm predictive CMOS technology model in SPICE.
This thesis proposes the implementation of MRF using Binary decision Diagrams (BDDs) where such circuits are realized on bi-directional switches. To accomplish the stability, we introduce BDD with feedback, called Cyclic BDD. The proposed designs are oriented at hardware implementation on the BDD based wrap-gate nanowire architectures. The comparison of the proposed design against conventional probabilistic models, in terms of performance, shows lesser power dissipation with the minimum area overhead.
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Engineering--Electronics and Electrical
Citation
Tangim, G. (2012). Noise-Immune Digital Circuit Design Based on Probabilistic Models (Master's thesis, University of Calgary, Calgary, Canada). Retrieved from https://prism.ucalgary.ca. doi:10.11575/PRISM/27112