Integrated switched capacitor cyclic algorithmic converters

Date
1989
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Abstract
A switched capacitor cyclic algorithmic converter circuit is presented. The cir­cuit is capable of performing both digital to analog and analog to digital conversions using a number of published algorithms. Error sources that limit converter resolution are investigated and circuit designs that minimize these errors are described. Test re­sults from an integrated CMOS prototype indicate that the simpler algorithms outper­form schemes that attempt to compensate for circuit nonidealities.
Description
Bibliography: p. 74-75.
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Citation
Leckie, B. M. (1989). Integrated switched capacitor cyclic algorithmic converters (Master's thesis, University of Calgary, Calgary, Canada). Retrieved from https://prism.ucalgary.ca. doi:10.11575/PRISM/13468
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