Please use this identifier to cite or link to this item:
|Title:||Synthesis of digital signal processing systems using pipelined bit-serial arithmetic|
|Publisher:||Electrical and Computer Engineering, University of Calgary|
|Description:||Bibliography: p. 121-124.|
|Appears in Collections:||University of Calgary Theses|
Files in This Item:
There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.