Capturing Register and Control Dependence in Memory Consistency Models with Applications to the Itanium Architecture
Date
2006-07-11
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Abstract
A complete framework for modelling memory consistency that includes
register and control dependencies is presented. It allows us to determine
whether or not a given computation could have arisen from a given program
running on a given multiprocessor architecture. The framework is used to
provide an exact description of the computations of (a subset of) the Itanium
instruction set on an Itanium multiprocessor architecture. We show that
capturing register and control dependencies is crucial: a producer/consumer
problem is solvable without using strong synchronization primitives on Itanium
multiprocessors, but is impossible without exploiting these dependencies.
Keywords: Multiprocessor Memory consistency, register and control dependency,
Itanium, process coordination.
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Computer Science