Abstract
The Partial Orders Framework [3] provides a unified way to
specify the memory semantics of distributed systems. This report demonstrates
the usefulness of this framework for reasoning about the behavior of the
shared memory of existing multiprocessors. Three bus-based machine models
are examined: total ordering, total store ordering, and partial store
ordering. A formal and unambiguous description of their memory consistency
models is established using the unifying framework. The influence of caches
on the memory is also investigated.
Notes
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