Introduction of an Accumulation-mode MOS varactor (AMOSV) into CMOS technol­ogy has opened a new area for CMOS frequency multipliers which have higher output power, higher speed, better noise performance compared to the traditional resistive­based multiplying techniques in CMOS. In this thesis a 34-GHz frequency tripler with an anti-series AMOSV configuration has been introduced with the measured minimum conversion loss of 27 dB and measured maximum third harmonic output power of -21 dBm. A 34-GHz power amplifier (PA) is also integrated with the frequency tripler to get higher power at the output. The maximum output power (simulated) from the power integrated tripler is -16 dBm at 102 GHz with -2.07 dBm input power level at 34 GHz. The challenges and limitation are also discussed here and some of them are enlisted as potential future work on this topic.