Smith, MichaelDeng, Dongcheng2014-01-202014-03-152014-01-202014http://hdl.handle.net/11023/1274With software defects reducing profits in many fields, it is worthwhile to consider moving key defect reducing strategies from one development area into another. A considerable amount of effort has been contributed to adapt and adopt the success of Agile methods into the embedded domain as defect-reduction methods. However, limited efficient and effective tools constrain the applicability of the Agile philosophy. Moreover, little studies have been reported to summarize the current state of the Agile-inspired embedded software development (AIESD) domain. The implications of an overview of AIESD generated from a systematic mapping study are discussed. An Agile test support (ATS) co-processor was proposed to provide low-overhead test insertion capability to embedded processors. The performance of the ATS was compared to existing hardware-assisted test insertion techniques. A demonstration application shows the use of ATS co-processor in multi-threaded environment.engUniversity of Calgary graduate students retain copyright ownership and moral rights for their thesis. You may use this material in any way that is permitted by the Copyright Act or through licensing that has been assigned to the document. For uses that are not allowable under copyright legislation or licensing, you are required to seek permission.Engineering--Electronics and ElectricalEmbedded SystemsAgile Software EngineeringSystematic MappingAgile Test Support Co-processorSoftware Testingmaster thesis10.11575/PRISM/27616