Haslett, James W.Leckie, Brian M.2005-07-212005-07-2119890315542632http://hdl.handle.net/1880/21633Bibliography: p. 74-75.A switched capacitor cyclic algorithmic converter circuit is presented. The cir­cuit is capable of performing both digital to analog and analog to digital conversions using a number of published algorithms. Error sources that limit converter resolution are investigated and circuit designs that minimize these errors are described. Test re­sults from an integrated CMOS prototype indicate that the simpler algorithms outper­form schemes that attempt to compensate for circuit nonidealities.xiii, 86 leaves : ill. ; 30 cm.engUniversity of Calgary graduate students retain copyright ownership and moral rights for their thesis. You may use this material in any way that is permitted by the Copyright Act or through licensing that has been assigned to the document. For uses that are not allowable under copyright legislation or licensing, you are required to seek permission.TK 7887.6 L43 1989Digital-to-analog convertersmaster thesis10.11575/PRISM/13468TK 7887.6 L43 1989