Gu, JunDu, Bin2005-07-292005-07-291998Du, B. (1998). A global test generation system for sequential circuits (Doctoral thesis, University of Calgary, Calgary, Canada). Retrieved from https://prism.ucalgary.ca. doi:10.11575/PRISM/245520612346706http://hdl.handle.net/1880/25965Bibliography: p. 136-142xv, 142 leaves : ill. ; 30 cm.engUniversity of Calgary graduate students retain copyright ownership and moral rights for their thesis. You may use this material in any way that is permitted by the Copyright Act or through licensing that has been assigned to the document. For uses that are not allowable under copyright legislation or licensing, you are required to seek permission.TK7868 .L6 D825 1997Logic circuits - TestingIntergrated circuits--Very large scale intergration.Digital electronicsdoctoral thesis10.11575/PRISM/24552TK7868 .L6 D825 1997