Turner, Laurence E.Manderson, Travis2017-12-182017-12-182012http://hdl.handle.net/1880/105767Bibliography: p. 125-128Many pages are in colour.The availability of small, low-power, low-cost FPGAs make them appealing for the implementation of reconfigurable digital filters in audio signal processing applications. A Digital Signal Processing (DSP) unit with a Multiply-Accumulate (MAC) core can be used to implement digital filters where the arithmetic operations required occur sequentially. The speed and limited resources of low-cost FPGAs limit the number of operations available to implement the digital filter. This thesis presents a reconfigurable digital filter compiler used to generate con­figuration data for a reconfigurable DSP unit used to implement a digital filter. The filter compiler automatically generates filter configurations that reduce the number of required operations to implement the digital filter. The finite-precision effects of the selected filter configuration on the magnitude frequency response are presented, allowing the user to choose an acceptable configuration.xi, 128 leaves : ill. ; 30 cm.engUniversity of Calgary graduate students retain copyright ownership and moral rights for their thesis. You may use this material in any way that is permitted by the Copyright Act or through licensing that has been assigned to the document. For uses that are not allowable under copyright legislation or licensing, you are required to seek permission.master thesis10.11575/PRISM/4766