Birtwistle, Graham M.Liu, Erwin Sai Ki, 1955-2005-07-212005-07-211986Liu, E. S. (1986). Two dimensional IC layout compaction (Doctoral thesis, University of Calgary, Calgary, Canada). Retrieved from https://prism.ucalgary.ca. doi:10.11575/PRISM/167740315359900http://hdl.handle.net/1880/23746Bibliography: p. 200-204.xix, 204 leaves : ill. ; 30 cm.engUniversity of Calgary graduate students retain copyright ownership and moral rights for their thesis. You may use this material in any way that is permitted by the Copyright Act or through licensing that has been assigned to the document. For uses that are not allowable under copyright legislation or licensing, you are required to seek permission.TK 7874 L58 1987Integrated circuitsElectronic circuit designTwo dimensional IC layout compactiondoctoral thesis10.11575/PRISM/16774TK 7874 L58 1987