Practical verification and synthesis of low latency asynchronous systems

Birtwistle, Graham M.Stevens, Kenneth S.2005-07-292005-07-291994Stevens, K. S. (1994). Practical verification and synthesis of low latency asynchronous systems (Doctoral thesis, University of Calgary, Calgary, Canada). Retrieved from https://prism.ucalgary.ca. doi:10.11575/PRISM/225140315994959http://hdl.handle.net/1880/30365Bibliography: p. 226-233.xiv, 233 leaves : ill. ; 30 cm.engUniversity of Calgary graduate students retain copyright ownership and moral rights for their thesis. You may use this material in any way that is permitted by the Copyright Act or through licensing that has been assigned to the document. For uses that are not allowable under copyright legislation or licensing, you are required to seek permission.TK 7868 A79 S74 1994Asynchronous circuits - Design and constructionDigital electronicsPractical verification and synthesis of low latency asynchronous systemsdoctoral thesis10.11575/PRISM/22514TK 7868 A79 S74 1994