Please use this identifier to cite or link to this item: http://hdl.handle.net/1880/45817
Title: CONNECTIONIST ARCHITECTURES
Authors: Cleary, John G.
Keywords: Computer Science
Issue Date: 1-Mar-1986
Abstract: Many schemes for computing have been proposed and variously described as distributed, connectionist, neuron-like and massively parallel. These are difficult to implement in current technology because at the circuit level they imply very complex wiring or switching and at the system level they cannot be efficiently simulated on a traditional von Neumann computer. A VLSI based architecture which avoids some of these problems is proposed. The basic operation implemented is the weighted summing of signals from a large number (~1000) inputs using the $sum$-chip. Signals are heavily multiplexed, and the weighting coefficients are stored in shift registers on the same chip that does the summing. The result is a VLSI chip which has two ingoing signal pins and one outgoing. As an example a system using the $sum$-chip is described which solves the n-Queens logical puzzle. Its application in chess playing is also considered briefly.
URI: http://hdl.handle.net/1880/45817
Appears in Collections:Cleary, John

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