Please use this identifier to cite or link to this item: http://hdl.handle.net/1880/46505
Title: THE IMPLEMENTATION AND VERIFICATION OF A CONDITIONAL SUM ADDER
Authors: Han, Jungang
Stone, Glen
Keywords: Computer Science
Issue Date: 1-Jul-1988
Abstract: In this paper we first formulate the Conditional Sum Addition (CSA) algorithm, then design an area-time efficient Conditional Sum Adder in CMOS. We also design a Binary Look-ahead Carry adder and a fast ripple carry adder in the same technology for the comparison of their performances. Finally we formally prove that the CMOS implementation of the CSA adder is correct (i.e. the implementation meets the specification of the intended behavior) by using Mike Gordon's Higher Order Logic (HOL) system.
URI: http://hdl.handle.net/1880/46505
Appears in Collections:Technical Reports

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