Browsing by Author "Verwaal, Nathaly"

Now showing 1 - 5 of 5
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    DEFINING AND COMPARING MEMORY CONSISTENCY MODELS
    (1997-06-01) Higham, Lisa; Kawash, Jalal; Verwaal, Nathaly
    Because multiprocessors implement sophisticated memory structures in order to enhance performance, processes can have inconsistent views of memory which may result in unexpected program outcomes. A memory consistency model is a set of guarantees that describes constraints on the outcome of sequences of interleaved and simultaneous operations in a multiprocessor. In this paper, we present a unifying framework to describe, understand, and compare memory consistency models. The framework is used to redefine and compare several widely used memory consistency models.
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    Informal Formative Assessment in a Flipped Classroom
    (Taylor Institure Teaching Community, 2014-05-13) Verwaal, Nathaly
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    Team Goals – Grades versus Learning
    (2013-05-15) Verwaal, Nathaly
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    WEAK MEMORY CONSISTENCY MODELS PART ONE: DEFINITIONS AND COMPARISONS
    (1998-01-01) Higham, Lisa; Kawash, Jalal; Verwaal, Nathaly
    Modern multiprocessors incorporate sophisticated memory structures in order to enhance performance. These structures allow processes to have inconsistent views of memory, which can, in turn, result in unexpected program outcomes. A memory consistency model is a set of guarantees that imposes constraints on the possible outcomes of sequences of interleaved and simultaneous operations in a multiprocessor. This paper presents a unifying framework to describe, compare and reason about memory consistency models. The framework is then used to give rigorous definitions of several widely used consistency models. These definitions are also shown to correspond to simple machine architectures. For each pair of models discussed, it is determined whether one is strictly stronger than the other or whether the two are incomparable.
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    WEAK MEMORY CONSISTENCY MODELS PART II:PROCESS COORDINATION PROBLEMS
    (1998-01-01) Higham, Lisa; Kawash, Jalal; Verwaal, Nathaly
    Process coordination problems have been extensively addressed in the context of sequential consistency. However, modern multiprocessors present a large variety of memory models that are anything but sequentially consistent. In these machines, the ordering constraints on memory accesses are few. We re-address two fundamental process coordination problems in the context of weak memory models. We prove that many models cannot support a solution to the critical section problem without additional powerful synchronization primitives. Nevertheless, we show that certain versions of the producer/consumer problem can be solved even in the weakest models without the need for such powerful instructions. These instructions are expensive, and avoiding their use is desirable for better performance.