A CMOS high temperature auto-zeroed amplifier
A precision operational amplifier has been developed which has input offset voltage and current of less than 15 ?V and 0.6 nA, respectively, over an operating temperature range of 2 5 - 200 °C. Low input offset voltage is maintained across the broad temperature range by using an auto-zeroing architecture. This topology uses two internal amplifiers. One amplifier always remains in the signal path, thereby ensuring continuous time processing of the input signal. The other amplifier cyclically zeros it own off set voltage and then zeros the off set voltage of the main amplifier. The primary difficulty in adapting the auto-zeroing topology for high temperature applications relates to leakage currents. A new input switch topology is presented which significantly reduces the leakage current induced input offset current. Degradation of the offset correction voltage that is stored on the internal sample and hold circuitry is reduced by storing the correction signal differentially, reducing switch leakage by using a donut shaped layout, using large external hold capacitors, and by optimizing the auxiliary signal path gain. A comprehensive theory of the operation of the auto-zeroed amplifier is developed, including optimization for minimum offset, frequency stability, and transient behaviour. Periodically switched netiii work analysis is applied to predict the low frequency noise performance. Design equations are presented which link noise performance and system level parameters such as open loop gain, bandwidth, and clock frequency. Five variations of a high temperature auto-zeroed amplifier are implemented and tested. These include three versions of the auxiliary input stage through which the offset correction voltage is applied. The best performance is achieved using an auxiliary input stage based on a parallel differential pair. The amplifiers are all fabricated in a standard 1.2 ?m N-well CMOS process. General specifications (2 5 - 200 °C) are: operation from a single 5 V supply voltage, power dissipation of 5.5 mW, input common mode range includes the negative supply voltage, a CMRR and PSRR of greater than 92 dB, a slew rate of at least 4.5 V /?S, and a unity gain bandwidth of at least 2.2 MHz.
Bibliography: p. 184-189.
Finvers, I. G. (1994). A CMOS high temperature auto-zeroed amplifier (Doctoral thesis, University of Calgary, Calgary, Canada). Retrieved from https://prism.ucalgary.ca. doi:10.11575/PRISM/21921