FORMAL SPECIFICATION OF THE SECD CHIP TOP AND REGISTER TRANSFER LEVELS

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dc.contributor.authorGraham, Brianeng
dc.date.accessioned2008-05-23T21:24:04Z
dc.date.available2008-05-23T21:24:04Z
dc.date.computerscience1999-05-27eng
dc.date.issued1989-10-01eng
dc.description.abstractThis report compiles the formal HOL definitions at the top and register transfer levels of the SECD Chip. Three sections cover abstract data types, component and specification definitions, and proofs of correctness of several segments.eng
dc.description.notesWe are currently acquiring citations for the work deposited into this collection. We recognize the distribution rights of this item may have been assigned to another entity, other than the author(s) of the work.If you can provide the citation for this work or you think you own the distribution rights to this work please contact the Institutional Repository Administrator at digitize@ucalgary.caeng
dc.identifier.department1989-370-32eng
dc.identifier.doihttp://dx.doi.org/10.11575/PRISM/31312
dc.identifier.urihttp://hdl.handle.net/1880/46591
dc.language.isoEngeng
dc.publisher.corporateUniversity of Calgaryeng
dc.publisher.facultyScienceeng
dc.subjectComputer Scienceeng
dc.titleFORMAL SPECIFICATION OF THE SECD CHIP TOP AND REGISTER TRANSFER LEVELSeng
dc.typeunknown
thesis.degree.disciplineComputer Scienceeng
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