All-Pass Delays and Residue Amplifier for a 10-GS/s Non-Blocking Subranging ADC

dc.contributor.advisorBelostotski, Leonid
dc.contributor.authorKabirkhoo, Zahra
dc.contributor.committeememberMaundy, Brent JP
dc.contributor.committeememberMurari, Kartikeya
dc.date2025-02
dc.date.accessioned2025-01-20T16:08:46Z
dc.date.available2025-01-20T16:08:46Z
dc.date.issued2025-01-08
dc.description.abstractDelay circuits play a critical role in various applications, notably, in recent years, analog delays have been utilized in certain analog-to-digital converter (ADC) architectures, including continuous-time pipelined ADCs (CTP-ADCs) and non-blocking subranging ADCs (NBSADCs), where they help improve the overall ADC speed and/or resolution. In this work, the proposed delay circuits are specifically tailored for a 10-GS/s, 8-bit non-blocking subranging ADC (NBS-ADC) intended for radio telescope applications. First, this thesis proposes a high-order all-pass-filter (APF) circuit topology. The design process and tunability are explored using both TSMC 65-nm-CMOS and 22-nm FDSOI CMOS technologies. The proposed 6th-order APF, implemented in TSMC 65-nm-CMOS, achieves a delay range from 250 ps (BW10%=0–8 GHz) to 400ps (BW10%=0–5 GHz) having the state-of-the-art DBW10%=2. Additionally, 3rd- and 4th-order APFs were subsequently designed in GlobalFoundries 22-nm FDSOI CMOS for a 5G beamforming receiver operating from 24.3 to 28.7 GHz. The 3rd- and 4th-order APFs exhibited 9-to-21 and 21-to-36 ps delay ranges, respectively, to generate beams from 0° to 35°. Also, in further steps we sought a solution to eliminate inductors entirely, leading to the design of a compact, inductorless, cascadable GHz-frequency APF delay circuit. Results obtained using a TSMC 65-nm-CMOS containing 4 cascaded APF cells, exhibiting a delay tuning range of 300 to 500 ps over a 0.1-to-4-GHz bandwidth. The filter occupies an active area of 0.04 mm2 and dissipates 6.2 mW/cell from a 1.3-V supply. The APF achieved a delay-per-area metric that is at least 1.6 times greater than that of previous gm-C APFs, while also operating across a wider bandwidth. It exhibited a high delay-bandwidth product (DBW) of 1.95, all while maintaining a gain of 3.3 dB. Finally, we presented a novel residue generation and amplification (RGA) stage that employs inductive peaking and a tunable-gain post-amplifier reaching a high gain and a wide bandwidth, for a 10-GS/s, 8-bit NBS-ADC intended for radio telescope applications.
dc.identifier.citationKabirkhoo, Z. (2025). All-pass delays and residue amplifier for a 10-GS/s non-blocking subranging ADC (Doctoral thesis, University of Calgary, Calgary, Canada). Retrieved from https://prism.ucalgary.ca.
dc.identifier.urihttps://hdl.handle.net/1880/120464
dc.language.isoen
dc.publisher.facultyGraduate Studies
dc.publisher.institutionUniversity of Calgary
dc.rightsUniversity of Calgary graduate students retain copyright ownership and moral rights for their thesis. You may use this material in any way that is permitted by the Copyright Act or through licensing that has been assigned to the document. For uses that are not allowable under copyright legislation or licensing, you are required to seek permission.
dc.subject.classificationEngineering--Electronics and Electrical
dc.titleAll-Pass Delays and Residue Amplifier for a 10-GS/s Non-Blocking Subranging ADC
dc.typedoctoral thesis
thesis.degree.disciplineEngineering – Electrical & Computer
thesis.degree.grantorUniversity of Calgary
thesis.degree.nameDoctor of Philosophy (PhD)
ucalgary.thesis.accesssetbystudentI do not require a thesis withhold – my thesis will have open access and can be viewed and downloaded publicly as soon as possible.
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