Noise figure optimization of fully integrated inductively degenerated sige hbt lnas

Simple item page
dc.contributor.advisorHaslett, James W.
dc.contributor.advisorBelostotski, Leonid
dc.contributor.authorIbrahim, Mohamed Farhat
dc.date.accessioned2017-12-18T22:29:44Z
dc.date.available2017-12-18T22:29:44Z
dc.date.issued2012
dc.descriptionBibliography: p. 148-153en
dc.description.abstractSilicon germanium (SiGe) heterojunction bipolar transistors (HBTs) have the properties of producing very low noise and high gain over a wide bandwidth. Because of these properties, SiGe HBTs have continually improved and now compete with InP and GaAs HEMTs for low-noise amplification. This thesis investigates the theoretical characterizations and optimizations of SiGe HBT low noise amplifiers (LNAs) for low-noise low-power applications, using SiGe BiCMOS (bipolar complementary metal-oxide-semiconductor) technology. The theoretical characterization of SiGe HBT transistors 1s investigated by a comprehensive study of the DC and small-signal transistor modeling. Based on a selected small-signal model, a noise model for the SiGe HBT transistor is produced. This noise model is used to build a cascode inductively degenerated SiGe HBT LNA circuit. The noise figure (NF) equation for this LNA is derived. This NF equation shows better than 94.4% agreement with the simulation results. With the small-signal model verification, a new analytical method for optimizing the noise figure of the SiGe HBT LNA circuits is presented. The novelty feature of this optimization is the inclusion of the noise contributions of the base inductor parasitic resistance, the emitter inductor parasitic resistance and the bond-wire inductor parasitic resistances. The optimization is performed by reducing the number of design variables as possible. This improved theoretical optimization results in LNA designs that achieve better noise figure performance compared to previously published results in bipolar and BiCMOS technologies. Different design constraints are discussed for the LNA optimization techniques. Three different LNAs are designed. The three designs are fully integrated and fabricated in a single chip to achieve a fully monolithic realization. The LNA designs are experimentally verified. The low noise design produced a NF of l.5dB, S₂₁ of 15dB, and power consumption of 15mW. The three LNA designs occupied 1.4 µm² in 130 nm BiCMOS technology.en
dc.format.extentxix, 204 leaves : ill. ; 30 cm.en
dc.identifier.citationIbrahim, M. F. (2012). Noise figure optimization of fully integrated inductively degenerated sige hbt lnas (Doctoral thesis, University of Calgary, Calgary, Canada). Retrieved from https://prism.ucalgary.ca. doi:10.11575/PRISM/4662en_US
dc.identifier.doihttp://dx.doi.org/10.11575/PRISM/4662
dc.identifier.urihttp://hdl.handle.net/1880/105663
dc.language.isoeng
dc.publisher.institutionUniversity of Calgaryen
dc.publisher.placeCalgaryen
dc.rightsUniversity of Calgary graduate students retain copyright ownership and moral rights for their thesis. You may use this material in any way that is permitted by the Copyright Act or through licensing that has been assigned to the document. For uses that are not allowable under copyright legislation or licensing, you are required to seek permission.
dc.titleNoise figure optimization of fully integrated inductively degenerated sige hbt lnas
dc.typedoctoral thesis
thesis.degree.disciplineElectrical and Computer Engineering
thesis.degree.grantorUniversity of Calgary
thesis.degree.nameDoctor of Philosophy (PhD)
ucalgary.item.requestcopytrue
ucalgary.thesis.accessionTheses Collection 58.002:Box 2073 627942917
ucalgary.thesis.notesUARCen
ucalgary.thesis.uarcreleaseyen
Files
Original bundle
Now showing 1 - 1 of 1
Thumbnail Image
Name:
thesis_Ibrahim_2012.pdf
Size:
81.15 MB
Format:
Adobe Portable Document Format
Description:
Download
Collections
Legacy Theses