Capturing Register and Control Dependence in Memory Consistency Models with Applications to the Itanium Architecture
dc.contributor.author | Higham, Lisa | eng |
dc.contributor.author | Jackson, LillAnne | eng |
dc.contributor.author | Kawash, Jalal | eng |
dc.date.accessioned | 2008-02-27T22:13:29Z | |
dc.date.available | 2008-02-27T22:13:29Z | |
dc.date.computerscience | 2006-07-11 | eng |
dc.date.issued | 2006-07-11 | eng |
dc.description.abstract | A complete framework for modelling memory consistency that includes register and control dependencies is presented. It allows us to determine whether or not a given computation could have arisen from a given program running on a given multiprocessor architecture. The framework is used to provide an exact description of the computations of (a subset of) the Itanium instruction set on an Itanium multiprocessor architecture. We show that capturing register and control dependencies is crucial: a producer/consumer problem is solvable without using strong synchronization primitives on Itanium multiprocessors, but is impossible without exploiting these dependencies. Keywords: Multiprocessor Memory consistency, register and control dependency, Itanium, process coordination. | eng |
dc.description.notes | We are currently acquiring citations for the work deposited into this collection. We recognize the distribution rights of this item may have been assigned to another entity, other than the author(s) of the work.If you can provide the citation for this work or you think you own the distribution rights to this work please contact the Institutional Repository Administrator at digitize@ucalgary.ca | eng |
dc.identifier.department | 2006-837-30 | eng |
dc.identifier.doi | http://dx.doi.org/10.11575/PRISM/30822 | |
dc.identifier.uri | http://hdl.handle.net/1880/45983 | |
dc.language.iso | Eng | eng |
dc.publisher.corporate | University of Calgary | eng |
dc.publisher.faculty | Science | eng |
dc.subject | Computer Science | eng |
dc.title | Capturing Register and Control Dependence in Memory Consistency Models with Applications to the Itanium Architecture | eng |
dc.type | unknown | |
thesis.degree.discipline | Computer Science | eng |
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