A global test generation system for sequential circuits

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dc.contributor.advisorGu, Jun
dc.contributor.authorDu, Bin
dc.date.accessioned2005-07-29T14:59:18Z
dc.date.available2005-07-29T14:59:18Z
dc.date.issued1998
dc.descriptionBibliography: p. 136-142en
dc.format.extentxv, 142 leaves : ill. ; 30 cm.en
dc.identifier.citationDu, B. (1998). A global test generation system for sequential circuits (Doctoral thesis, University of Calgary, Calgary, Canada). Retrieved from https://prism.ucalgary.ca. doi:10.11575/PRISM/24552en_US
dc.identifier.doihttp://dx.doi.org/10.11575/PRISM/24552
dc.identifier.isbn0612346706en
dc.identifier.lccTK7868 .L6 D825 1997en
dc.identifier.urihttp://hdl.handle.net/1880/25965
dc.language.isoeng
dc.publisher.institutionUniversity of Calgaryen
dc.publisher.placeCalgaryen
dc.rightsUniversity of Calgary graduate students retain copyright ownership and moral rights for their thesis. You may use this material in any way that is permitted by the Copyright Act or through licensing that has been assigned to the document. For uses that are not allowable under copyright legislation or licensing, you are required to seek permission.
dc.subject.lccTK7868 .L6 D825 1997en
dc.subject.lcshLogic circuits - Testing
dc.subject.lcshIntergrated circuits--Very large scale intergration.
dc.subject.lcshDigital electronics
dc.titleA global test generation system for sequential circuits
dc.typedoctoral thesis
thesis.degree.disciplineElectrical and Computer Engineering
thesis.degree.grantorUniversity of Calgary
thesis.degree.nameDoctor of Philosophy (PhD)
ucalgary.item.requestcopytrue
ucalgary.thesis.accessionTheses Collection 58.002:Box 1136 520680137
ucalgary.thesis.notesUARCen
ucalgary.thesis.uarcreleaseyen
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