HOP: A PROCESS MODEL FOR SYNCHRONOUS HARDWARE SEMANTICS, AND EXPERIMENTS IN PROCESS COMPOSITION

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dc.contributor.authorGopalakrishnan, Ganesh C.eng
dc.contributor.authorFujimoto, Richard M.eng
dc.contributor.authorAkella, Venkatesheng
dc.contributor.authorMani, Narayana S.eng
dc.date.accessioned2008-05-23T21:23:16Z
dc.date.available2008-05-23T21:23:16Z
dc.date.computerscience1999-05-27eng
dc.date.issued1989-04-01eng
dc.description.abstractWe present a language "Hardware viewed as Objects and Processes" (HOP) for specifying the structure, behavior, and timing of hardware systems. HOP embodies a simple process model for lock-step synchronous processes. An absproc specification written in HOP describes the externally observable behavior of a process. A collection of absprocs may be composed to form a larger process, using the operators parallel composition, renaming, and hiding. In this paper we present the communication primitives of HOP, illustrate HOP through several examples, and then present its operational semantics. We present an algorithm PARCOMP that is based on HOP's semantics. We illustrate three uses of PARCOMP: (i) inferring concise behavioral descriptions of systems from their structural descriptions; (ii) static detection of control timing errors during behavioral inference; (iii) productive and run-time efficient functional simulation using the inferred behavior.eng
dc.description.notesWe are currently acquiring citations for the work deposited into this collection. We recognize the distribution rights of this item may have been assigned to another entity, other than the author(s) of the work.If you can provide the citation for this work or you think you own the distribution rights to this work please contact the Institutional Repository Administrator at digitize@ucalgary.caeng
dc.identifier.department1989-350-12eng
dc.identifier.doihttp://dx.doi.org/10.11575/PRISM/31319
dc.identifier.urihttp://hdl.handle.net/1880/46581
dc.language.isoEngeng
dc.publisher.corporateUniversity of Calgaryeng
dc.publisher.facultyScienceeng
dc.subjectComputer Scienceeng
dc.titleHOP: A PROCESS MODEL FOR SYNCHRONOUS HARDWARE SEMANTICS, AND EXPERIMENTS IN PROCESS COMPOSITIONeng
dc.typeunknown
thesis.degree.disciplineComputer Scienceeng
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